1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to the improvement of a semiconductor memory device such as a video random access memory (hereinafter simply referred to as video RAM) which stores picture data and which is used, for example, in a video display device or the like.
2. Description of the Prior Art
In general, a video RAM stores picture data which corresponds to a picture displayed on a video display device. The picture data in the video RAM is serially read out to display the picture, and is suitably rewritten by a random access operation of a processor. In the video RAM, therefore, a random access operation of the processor and a serial reading operation onto the video display device are effected at independent timings. Therefore, it is desired that these access operations be performed independently so as not to affect each other.
There are several known types of video RAM's in which the random access operation by the processor and the serial reading operation by the video display device can be effected independently. In one of the conventional video RAM's, the random access operation by the processor can be effected at any time. However, serial access from the video display device and the like is not allowed during the access time of the processor, and, therefore, dropout of video signals often arises, causing noise on the picture. In another type of conventional video RAM, the access time of the processor is only during each fly-back period of video signals, and no noise arises on the displayed picture. However, in this video RAM, random access by the processor is greatly limited and the processing efficiency of the processor is deteriorated. In still another type of conventional video RAM device, clock signals are supplied from the video display device, etc., to the processor and the processor can access the video RAM device only when the potential level of the clock signals is, for example, low. In this device, however, the frequency of the clock signals supplied to the processor must be adjusted to that of the clock signals of the video display device, and therefore, it is impossible to make the best use of the processing ability of the processor.